In the related art, a memory system may include an NAND type flash memory (hereinafter, referred to as a “NAND memory”). The memory system may include a memory controller, which controls data transmission between a host and a NAND memory. The memory controller may manage the correspondence between a logical address and a physical address as logical-physical address translation information. The logical address is location information indicating a location in a logical address space that the memory system provides to the host. The physical address is location information indicating a physical location in a NAND memory.
The memory controller may cache the logical-physical address translation information into a memory such as a random access memory (RAM), which allows a high-speed operation, and use the cached logical-physical address translation information when the cache is hit.